Home > News

News

Successful Single Event Effects Test Applying Pulsed Laser for High-performance CPU Used in Satellites by CSSAR

Editor: | Jul 29 , 2009

CSSAR--In recent years, Center for Space Science and Applied Research (CSSAR), Chinese Academy of Science, had successfully manufactured Chinese first Pulsed Laser Single Event Effects (SEE) Facility (SEEF). This facility can simulate SEE induced by heavy ion with equivalent  LET of 0.1-200MeV.cm2/mg, and it can also perform 3D scan test for chips with sub-micron step using single laser shot or repeated laser pulses of 1kHz. On the other side, the pulsed laser with precise time characteristics can be used to test the dynamic response of devices and circuits on SEE.

Applying SEEF, CSSAR replicated the anomaly phenomena of certain satellite payload within 48 hours, providing significant supports to the anomaly cause determination and countermeasure making.

Recently, CSSAR firstly applying chip backside laser irradiation technique in China to perform SEE test on 4M-bit SRAM devices and the Power PC CPU device manufactured with 90nm SOI technology.

The test acquired the Single Event Latchup (SEL) sensitivity map of the SRAM device and measured the SEL threshold which coincides well with the experimental results of heavy ion accelerator. And in the scan test the most sensitive part for Single Event Upset (SEU) in the Power PC CPU device was determined. After that, analysis of the device’s layout showed that this part was just the territory of the common register of the CPU chip. Furthermore the experiment observed SEU and Multiple Bits Upset (MBU) in the CPU induced by laser pulse and its influence on computer system.

It’s proved that SEEF is a powerful tool for SEE sensitivity assessment of the devices used in satellites, and also an effective tool for the verification of the SEE mitigation for circuit system and chip design. It’s an important platform for simulation the space effects on electronic parts. In general SEEF and the test have great significance to improve the design of SEE mitigation and hardness for national satellite products and domestic aerospace devices.

 

Download: